IDT 2010 - Call for Papers

CALL FOR PAPERS

Scope -- Submissions -- Key Dates -- Additional Information -- Committees

Scope

The International Design & Test Workshop (IDT) provides a unique forum to researchers and practitioners in the Middle East and Africa (MEA) region to come together and discuss new research ideas and present new research results in the areas of VLSI design, test, automation and fault tolerance. Workshop topics include all aspects of design, test and automation.

Specific topics are to include:

Analog, Mixed-Signal and RF Design and Test
Architectural and Logic Synthesis
Automatic Test Equipment
Built-In Self-Test (BIST)
Defect-Based Test
Design for Manufacturability (DFM)
Design for Reliability
Design for Test
Design of Low Power Systems and Power Analysis
Design Verification and Formal Methods
Economics of Test
Embedded Systems
Emerging Technologies, Systems and Applications
Failure Analysis
Fault Modeling
Fault Tolerance
IC Physical Design Automation
iDDQ and iDDT Testing
Memory and FPGA Test and Repair
MEMs Design and Test
Nanotechnology-based Architectures
On-Line Testing
Packaging
Real-time Systems
Reconfigurable Computing
Test Issues in Nanotechnology
SOC/NOC/MPSOC
Self-Repair and Design for Self-Repair
System Design Methods
System Specification and Modelling
Test Generation, Simulation and Diagnosis
Test Resource Partitioning
3D IC Design and Test
Applications Design: Media, Signal Processing, Wireless Communication and Networking, Automotive, Military, Secure Embedded Implementations, etc.

Submissions

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To present their work at the workshop, authors are invited to submit a full paper limited to six (6) pages in the standard IEEE conference double-column format, including figures and references. Each submission should include: title, full name and affiliation of all authors, an abstract of 150 words, and keywords. It should also identify a contact author and include a complete correspondence address, phone number, fax number, and E-mail address. All submissions must be made electronically in PDF format through the IDT website. Proposals for panels, hot topic sessions and embedded tutorials are also invited.

Please ensure that your PDF file is readable by Acrobat Reader. The submission of a paper, a hot topic session or a panel proposal will be considered evidence that upon acceptance, the author(s) will register and attend in person and present the paper or organize the panel at the workshop.

Extended versions of a selection of best papers will be invited for subsequent publication in IEEE Design & Test of Computer.

Key Dates

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Submission deadline: , 2010
Notification of acceptance: , 2010
Final copy deadline: , 2010

Additional Information

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General Information

First Last
Affiliation
Address (Optional)
Tel.: +1 Phone Number
E-mail:

Committees

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Organizing Committee

General Chair

Program Chair

Past Chair

Finance Chair

Publications Chair

Web Publicity Chair

Publicity Chair

Industry Liaison

Local Arrangements Chair

Program Committee

Steering Committee

For more information, visit us on the web at: http://www.event URL.com

The Event Name (Event2008 ) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC) and the IEEE Computer Society Design Automation Technical Committee.